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File memtest86+.spec of Package memtest86+ (Revision 17)
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# # spec file for package memtest86+ (Version 4.0) # # Copyright (c) 2007 SUSE LINUX Products GmbH, Nuernberg, Germany. # This file and all modifications and additions to the pristine # package are under the same license as the package itself. # # Please submit bugfixes or comments via http://bugs.opensuse.org/ # Name: memtest86+ Version: 4.10 Release: 1 # License: GPL Group: System/Boot # BuildRoot: %{_tmppath}/%{name}-%{version}-build %ifarch x86_64 BuildRequires: glibc-devel-32bit %endif ExclusiveArch: %ix86 x86_64 Provides: lilo:/boot/memtest86+.bin # URL: http://www.memtest.org Source: http://www.memtest.org/download/%{version}/%{name}-%{version}.tar.gz Patch0: fix-destdir Patch1: include-linkonce #Patch3: include-gnuhash #Patch4: fix-overflows.diff Patch5: serial-enable Patch6: work-around-4G-virtual-overflow # Summary: Memory Testing Image for x86 Architecture %description Memtest86 is an image that can be booted instead of a real OS. Once booted, it can be used to test the computer's memory. Authors: -------- Samuel Demeulemeester <memtest@memtest.org> Original memtest86 package: John Coffman <JohnInSD@san.rr.com> Werner Almesberger <Werner.Almesberger@epfl.ch> PowerPC part: Paul Mackeras <paulus@samba.org> Cort Dougan <cort@fsmlabs.com> Benjamin Herrenschmidt <benh@kernel.crashing.org> Memtest86: Chris Brady <crsbrady@earthlink.net> %prep %setup %patch0 -p1 %patch1 -p1 ##%patch3 -p1 ##%patch4 -p1 %patch5 -p1 %patch6 -p1 %build %ifarch x86_64 make CC="gcc -m32" AS="as --32" %else make %endif %install install -D -m 0644 memtest.bin $RPM_BUILD_ROOT/boot/memtest86+.bin install -D -m 0644 memtest.bin $RPM_BUILD_ROOT/boot/memtest.bin %post if [ "$YAST_IS_RUNNING" != instsys -a $1 = 1 -a \ -x /sbin/update-bootloader ]; then /sbin/update-bootloader --add --image /boot/memtest.bin --name "Memory Test (memtest86+)" fi true %postun test -x /sbin/update-bootloader && /sbin/update-bootloader --remove --force --image /boot/memtest.bin || true %files %defattr(-,root,root) /boot/memtest86+.bin /boot/memtest.bin %doc README* changelog FAQ %changelog * Tue May 25 2010 Carsten Schoene <cs@linux-administrator.com> - 4.10-1 - update to new release 4.10 - New Features - Added support for Core i7 Extreme CPU (32nm) - Added support for Core i5/i3 (32 nm) - Added support for Pentium Gxxxx (32 mn) - Added support for Westmere-based Xeon - Added preliminary support for Intel Sandy Bridge - Added support for AMD 6-cores CPU - Added detection for Intel 3200/3210 - New installer for USB Key - Bug Fixes - Corrected a crash at startup - Many others bug fixes * Wed Sep 23 2009 Carsten Schoene <cs@linux-administrator.com> - 4.00-65 - update to new release 4.00 - New Features - Major Architectural changes - First pass twice faster (reduced iterations) - Detect DDR2/3 brands and part numbers on Intel DDR2/3 chipsets - Added detection for Intel "Clarkdale" CPU - Added detection for Intel "Gulftown" CPU - Added detection for AMD "Magny-Cours" CPU - Added detection for Intel XMP Memory - Added for CPU w/ 0.5/1.5/3/6/12/16/18/24MB L3 - Added "clean" DMI detection for DDR3/FBDIMM2 - Better detection of Integrated Memory Controllers - Bug Fixes - Corrected detection for Intel "Lynnfield" CPU - Corrected detection for AMD 45nm K10 CPU - Solved crash with AMD Geode LX - Complies with SMBIOS 2.6.1 specs - Fixed compilation issues with gcc 4.2+ - Many others bug fixes * Sun Aug 02 2009 Carsten Schoene <cs@linux-administrator.com> - 2.11-50 - backport some patches from openSUSE 11.1 (memtest86+ 2.01) * Tue Dec 23 2008 Carsten Schoene <cs@linux-administrator.com> - new release 2.11 - This release adds support for the Intel Core i5 (Lynnfield) CPU - Intel P55 Southbridge - Intel PM45/GM45/GM47 Mobile chipset - Intel GL40/GS45 Mobile chipset - It corrects DDR2/DDR3 detection on Intel x35/x45 - corrects detection on some Core i7 CPUs - fixes a bug with some AMI BIOS (freeze at startup) - has various bugfixes * Sun Nov 16 2008 Carsten Schoene <cs@linux-administrator.com> - new release 2.10 - Support was added for Intel Core i7 (Nehalem) CPU - Intel Atom Processors - Intel G41/G43/G45 Chipsets - Intel P43/P45 Chipsets - Intel US15W (Poulsbo) Chipset - Intel EP80579 (Tolapai) SoC CPU - ICH10 Southbridge (SPD/DMI) and Intel 5000X - A workaround was added for DDR3 DMI detection - The program is now fully aware of a CPU with L3 cache (Core i7 & K10) - Intel 5000Z chipset detection - Memory Frequency on AMD K10 - cache detection on C7/Isaiah CPU were fixed * Sat Jul 05 2008 Carsten Schoene <cs@linux-administrator.com> - update to work with memtest86+ in parallel