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Changes of Revision 11
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Changed
memtest86+.spec
@@ -1,5 +1,5 @@ # -# spec file for package memtest86+ (Version 1.70) +# spec file for package memtest86+ (Version 2.10) # # Copyright (c) 2007 SUSE LINUX Products GmbH, Nuernberg, Germany. # This file and all modifications and additions to the pristine @@ -10,10 +10,10 @@ Name: memtest86+ -Version: 2.01 +Version: 2.10 Release: 40 # -License: BSD 3-Clause +License: GPL Group: System/Boot # BuildRoot: %{_tmppath}/%{name}-%{version}-build @@ -82,5 +82,20 @@ %doc README* changelog FAQ %changelog +* Sun Nov 16 2008 Carsten Schoene <cs@linux-administrator.com> +- new release 2.10 + - Support was added for Intel Core i7 (Nehalem) CPU + - Intel Atom Processors + - Intel G41/G43/G45 Chipsets + - Intel P43/P45 Chipsets + - Intel US15W (Poulsbo) Chipset + - Intel EP80579 (Tolapai) SoC CPU + - ICH10 Southbridge (SPD/DMI) and Intel 5000X + - A workaround was added for DDR3 DMI detection + - The program is now fully aware of a CPU with L3 cache (Core i7 & K10) + - Intel 5000Z chipset detection + - Memory Frequency on AMD K10 + - cache detection on C7/Isaiah CPU were fixed + * Sat Jul 05 2008 Carsten Schoene <cs@linux-administrator.com> - update to work with memtest86+ in parallel
Added
memtest86+-2.10.tar.gz
^